Computer Organization 2025 — MAKAUT · PCC-CS-302 · Mid Sem PYQ with solutions

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Maulana Abul Kalam Azad University of Technology

Solutions

35 answers across 3 groups

Try each question first, then open it to check your answer.

Group AVery Short Answer Type Question · answer any 10 · 1 mark each

  1. I

    In a microprocessor the address of the next instruction to be executed is stored in

    Free sample

    Answer: Program Counter (PC)

    Explanation

    The Program Counter is a special-purpose register that holds the memory address of the next instruction to be fetched and executed.

  2. II

    In Booth's multiplication algorithm which type of sign number representation is used?

  3. III

    Principle of locality justifies the use of memory.

  4. IV

    Specify the statement is true or False. When DMA operation takes place then always CPU seats idle.

  5. V

    Operating System is categorised under which type of software?

  6. VI

    Maximum n bit 2's complement number is

  7. VII

    How many locations are present in 2K RAM chip?

  8. VIII

    In case of polling using 8 lines how many different bus grant response can generate?

  9. IX

    During the transfer of data between the processor and memory we use

  10. X

    When we perform subtraction on -7 and 1 the answer in 2's complement form is

  11. XI

    To construct a 32K×1632K\times16 RAM chip by using 8KB RAM chips decoder is required. What is the specification of this decoder?

  12. XII

    In DMA operation i) Data is transferred between main memory and I/O device ii) Data is transferred between main memory and secondary memory iii) Data is transferred between main memory and CPU

    ai) and ii)bi) onlyci), ii) and iii)dii) Only

Group BShort Answer Type Question · answer any 3 · 5 marks each

  1. 2

    Difference between hardwired and microprogrammed control

  2. 3

    Define Instruction Cycle, Machine Cycle and T-state.

  3. 4

    Design a 4-bit adder-subtractor composite unit.

  4. 5

    A three level memory system having cache access time of 15 ns, main memory access time of 25 ns and disk access time of 40 ns has a cache hit ratio of 0.96 and main memory hit ratio of 0.9. What should be the Average Memory Access Time?

  5. 6

    Draw a flowchart of Restoring division algorithm.

Group CLong Answer Type Question · answer any 3

  1. 7(a)

    What is bus arbitration?

    2 marks
  2. 7(b)

    Explain with a suitable diagram the daisy chaining priority interrupts technique.

    5 marks
  3. 7(c)

    What are the disadvantages of daisy chaining technique?

    2 marks
  4. 7(d)

    Explain the working principle of polling method and How the limitations of daisy chaining method are reduced by using polling?

    6 marks
  5. 8(a)

    Draw the functional diagram of a computer and explain each block.

    6 marks
  6. 8(b)

    What is signed number and unsigned number?

    1 mark
  7. 8(c)

    Explain zero address, one address, two address and three address instruction with suitable example.

    6 marks
  8. 8(d)

    Convert the binary number (1101101110)2(1101101110)_{2} into its equivalent Hexadecimal number.

    1 mark
  9. 8(e)

    What is the 16 bit representation of -6 ?

    1 mark
  10. 9(a)

    Draw the flowchart of Booth's Multiplication algorithm.

    5 marks
  11. 9(b)

    Multiply 9 by +6 using Booth's algorithm. Assume the multiplicand and multiplier to be 5 bits each.

    6 marks
  12. 9(c)

    Explain the operation of 4 bit carry look ahead adder with suitable diagram.

    4 marks
  13. 10(a)

    Explain the associative and direct mapped cache mapping approaches.

    4 marks
  14. 10(b)

    Identify size of the sub-fields (in bits) in the address for direct mapping, associative and set associative mapping cache schemes where processor address is 32 bit. We have 2MB cache memory. The block size is 64 bytes. There are 4 blocks in cache set.

    6 marks
  15. 10(c)

    Explain the working principle of CMOS Static RAM Cell.

    5 marks
  16. 11(a)

    Draw the block diagram of a basic hardwired control unit.

    5 marks
  17. 11(b)

    Design Booth's Multiplier control logic using Microprogrammed Control unit approach.

    7 marks
  18. 11(c)

    What is programmed I/O technique? Why it is not very useful?

    3 marks

About this paper

The MAKAUT Computer Organization (PCC-CS-302) 2025 Mid Sem previous year question paper, set in semester 3. Download the verified PDF or read it online, then check your answers against the worked solutions above.

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Why solve Computer Organization PYQs?

Frequently asked questions

5 questions

What is the subject code for Computer Organization?

PCC-CS-302 is the MAKAUT subject code for Computer Organization.

Which exam is this Computer Organization question paper from?

The MAKAUT 2025 Mid Sem exam, semester 3. A student shared it, and it was checked before publishing.

Which branches is this Computer Organization paper for?

It's a common paper for 4 B.Tech branches: Computer Science and Engineering, Computer Science and Engineering (Data Science), Information Technology and Computer Science and Engineering (Artificial Intelligence and Machine Learning). Every branch gets the same questions.

Where can I find more PCC-CS-302 question papers?

On the Computer Organization subject page, which collects every year's papers along with notes and the syllabus.

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